Брик WR940N

Беспроводные маршрутизаторы серии N
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Hydralisk
Сообщения: 3
Зарегистрирован: 24 июн 2018, 09:45
Страна: Россия

Брик WR940N

Сообщение Hydralisk » 24 июн 2018, 10:35

Название темы: Брик WR940N
Аппаратная версия устройства: ver 3.0
Провайдер: Дом.ру
Тип подключения: Static IP
Терминал, CH340:
"мусор"...
Linux version 2.6.31 (tomcat@buildserver) (gcc version 4.3.3 (GCC) ) #
67 Tue Mar 17 16:03:40 CST 2015
Ram size passed from bootloader =32M
flash_size passed from bootloader = 4
CPU revision is: 00019750 (MIPS 74Kc)
ath_sys_frequency: cpu 750 ddr 400 ahb 250
Determined physical RAM map:
memory: 02000000 @ 00000000 (usable)
Zone PFN ranges:
Normal 0x00000000 -> 0x00002000
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
0: 0x00000000 -> 0x00002000
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128
Kernel command line: console=ttyS0,115200 root=31:2 rootfstype=squashfs init=/sb
in/init mtdparts=ath-nor0:128k(u-boot),1024k(kernel),2816k(rootfs),64k(config),6
4k(art) mem=32M
PID hash table entries: 128 (order: 7, 512 bytes)
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Primary instruction cache 64kB, VIPT, 4-way, linesize 32 bytes.
Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
Writing ErrCtl register=00000000
Readback ErrCtl register=00000000
Memory: 27140k/32768k available (1639k kernel code, 5628k reserved, 413k data, 1
16k init, 0k highmem)
NR_IRQS:128
plat_time_init: plat time init done
r4k_clockevent_init: Ignoring int_usable failure
Calibrating delay loop... 374.78 BogoMIPS (lpj=749568)
Mount-cache hash table entries: 512
****************ALLOC***********************
Packet mem: 802324a0 (0x300000 bytes)
********************************************
NET: Registered protocol family 16
ath_pcibios_init: bus 0
***** Warning PCIe 0 H/W not found !!!
registering PCI controller with io_map_base unset
bio: create slab <bio-0> at 0
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
net_link: create socket ok.
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
NET: Registered protocol family 1
ATH GPIOC major 0
squashfs: version 4.0 (2009/01/31) Phillip Lougher
msgmni has been set to 53
io scheduler noop registered
io scheduler deadline registered (default)
Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled
serial8250.0: ttyS0 at MMIO 0xb8020000 (irq = 19) is a 16550A
console [ttyS0] enabled
PPP generic driver version 2.4.2
NET: Registered protocol family 24
5 cmdlinepart partitions found on MTD device ath-nor0
Creating 5 MTD partitions on "ath-nor0":
0x000000000000-0x000000020000 : "u-boot"
0x000000020000-0x000000120000 : "kernel"
0x000000120000-0x0000003e0000 : "rootfs"
0x0000003e0000-0x0000003f0000 : "config"
0x0000003f0000-0x000000400000 : "art"
->Oops: flash id 0xc84016 .
Ooops, why the devices couldn't been initialed?
TCP cubic registered
NET: Registered protocol family 17
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>
athwdt_init: Registering WDT success
VFS: Mounted root (squashfs filesystem) readonly on device 31:2.
Freeing unused kernel memory: 116k freed
init started: BusyBox v1.01 (2015.03.17-08:09+0000) multi-call binary
This Board use 2.6.31
xt_time: kernel timezone is -0000
nf_conntrack version 0.5.0 (512 buckets, 5120 max)
ip_tables: (C) 2000-2006 Netfilter Core Team
insmod: cannot open module `/lib/modules/2.6.31/kernel/iptable_raw.ko': No such
file or directory
insmod: cannot open module `/lib/modules/2.6.31/kernel/flashid.ko': No such file
or directory
PPPoL2TP kernel driver, V1.0
PPTP driver version 0.8.3
insmod: cannot open module `/lib/modules/2.6.31/kernel/harmony.ko': No such file
or directory
insmod: cannot open module `/lib/modules/2.6.31/kernel/af_key.ko': No such file
or directory
insmod: cannot open module `/lib/modules/2.6.31/kernel/xfrm_user.ko': No such fi
le or directory
vlan init params sucess.
qca956x_GMAC: Length per segment 1536
956x_GMAC: qca956x_gmac_attach
956x_GMAC: qca956x_set_gmac_caps
GPIO LED SETTINGS ....done
Currently in interrupt mode unit1
qca956x_set_gmac_caps CHECK DMA STATUS
mac:1 Registering S27....
qca956x_GMAC: RX TASKLET - Pkts per Intr:32
qca956x_GMAC: Max segments per packet : 1
qca956x_GMAC: Max tx descriptor count : 128
qca956x_GMAC: Max rx descriptor count : 128
qca956x_GMAC: Mac capability flags : 2401
956x_GMAC: qca956x_gmac_attach
956x_GMAC: qca956x_set_gmac_caps
Currently in interrupt mode unit0
qca956x_set_gmac_caps CHECK DMA STATUS
mac:0 Registering S27....
qca956x_GMAC: RX TASKLET - Pkts per Intr:32
qca956x_GMAC: Max segments per packet : 1
qca956x_GMAC: Max tx descriptor count : 128
qca956x_GMAC: Max rx descriptor count : 128
qca956x_GMAC: Mac capability flags : 2401
(none) mips #67 Tue Mar 17 16:03:40 CST 2015 (none)
(none) login: athr_gmac_ring_alloc Allocated 2048 at 0x81c4f000
sram_desc_cnt 1536,mac Unit 0,Tx r->ring_desc 0xbd000000
athr_gmac_ring_alloc Allocated 2048 at 0x81e5c800
sram_desc_cnt 3072,mac Unit 0,Rx r->ring_desc 0xbd000600
956x_GMAC: eth0 in MII MODE
Dragonfly -----> S27 PHY
Setting Drop CRC Errors, Pause Frames and Length Error frames
Setting PHY...
(none) mips #67 Tue Mar 17 16:03:40 CST 2015 (none)
(none) login: athr_gmac_ring_alloc Allocated 2048 at 0x81e5c000
sram_desc_cnt 4608,mac Unit 1,Tx r->ring_desc 0xbd000c00
athr_gmac_ring_alloc Allocated 2048 at 0x81df7800
sram_desc_cnt 6144,mac Unit 1,Rx r->ring_desc 0xbd001200
956x_GMAC: eth1 in RGMII MODE
Dragonfly -----> S27 PHY
ATHRS27: resetting s27
ATHRS27: s27 reset done
++++ athrs27_igmp_setup once---
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
athr_vlan_create 239 check vlan create failed.
athrs27_default_vtable_create 85 create fail retryCtreate = 0
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
athr_vlan_create 239 check vlan create failed.
athrs27_default_vtable_create 85 create fail retryCtreate = 1
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
athr_vlan_create 239 check vlan create failed.
athrs27_default_vtable_create 85 create fail retryCtreate = 2
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
_athr_vlan_read 181 reg1 = 0x0 @ATHR_VTF1_ADDR = 0x44
_athr_vlan_read 182 reg0 = 0x0 @ATHR_VTF0_ADDR = 0x40
athr_vlan_create 239 check vlan create failed.
athrs27_default_vtable_create 85 create fail retryCtreate = 3
+++ athrs27_default_vtable_create failed
---- set vlan table error
Restarting system.
Описание проблемы: Внезапно окирпичился. Перезагружается в цикле, TFTP-сервер не видит, tpl не ловит. Удержание reset не меняет картины. При нажатии Ctrl-C во время загрузки появляется диалог авторизации ((none) login:), известные пароли не принимает, на нажатие reset реагирует (Reset button down. restoring factory default...).

Goodwin
Модератор
Модератор
Сообщения: 3683
Зарегистрирован: 25 май 2011, 10:56
Страна: Россия

Re: Брик WR940N

Сообщение Goodwin » 24 июн 2018, 12:56

попробуйте перезалить рабочий дамп прошивки. если не поможет, то вилы.
Перед тем, как создать тему, посетите раздел ЧАСТО ЗАДАВАЕМЫЕ ВОПРОСЫ
TP-LINK Archer C7v2
Личные сообщения по техническим проблемам без сообщения на форуме не рассматриваются!

Sunasas11
Сообщения: 1
Зарегистрирован: 26 июн 2018, 10:03
Страна: laos

Re: Брик WR940N

Сообщение Sunasas11 » 26 июн 2018, 12:29

Очень хорошая информация в автономном режиме.

Hydralisk
Сообщения: 3
Зарегистрирован: 24 июн 2018, 09:45
Страна: Россия

Re: Брик WR940N

Сообщение Hydralisk » 08 июл 2018, 14:25

Sunasas11 писал(а):Очень хорошая информация в автономном режиме.
Поясните пож.
P.S. Заказал флэшер с прищепкой...

Hydralisk
Сообщения: 3
Зарегистрирован: 24 июн 2018, 09:45
Страна: Россия

Re: Брик WR940N

Сообщение Hydralisk » 03 окт 2018, 19:03

Коллеги, поделитесь дампом WR940Nv3 (941v6).

Ответить

Вернуться в «TL-WR940N / TL-WR941ND»